Аннотация:Building efficient FPGA-based AI inferenceaccelerators sets new requirements for FPGA compilers. AIinference accelerator contains very large amount of verysmall identical circuits (such as low precision multipliers).So, in order to maximize the overall acceleratorperformance, it is very important to build those smallcircuits optimally (in terms of area and delay). SAT-basedexact synthesis is known to be an efficient technique to buildoptimal LUT-based circuits for logic functions with a smallnumber of inputs.In this paper we extend exact synthesis methods to supportFPGA Adaptive Logic Module (ALM) structure. We presenta SAT-based exact synthesis tool that builds optimal Stratix10 and Agilex ALM-based circuits. We use the tool to buildoptimal FPGA circuits for low-precision multipliers anddemonstrate that the new circuits are 10-50% more area-efficient if compared with circuits generated by QuartusCompiler. Furthermore, we demonstrate that our approachidentified several new mappings with improved delay. To thebest of our knowledge, this is the first application of exactsynthesis realized on commercial FPGA architecture.